Sachin S. Sapatnekar

7 published titles

Design automation for timing-driven layout synthesis

1 edition

Timing analysis and optimization of sequential circuits

(Contributor)

1 edition

Layout optimization in VLSI design

(Contributor)

1 edition

Timing

1 edition

Designing digital computing systems with Verilog

(Contributor)

1 edition

Routing congestion in VLSI circuits : estimation and optimization

(Contributor)

1 edition

Handbook of algorithms for physical design automation

(Contributor)

1 edition